Fandom

Scratchpad

ZX Spectrum 128Ke

215,906pages on
this wiki
Add New Page
Discuss this page0 Share

Ad blocker interference detected!


Wikia is a free-to-use site that makes money from advertising. We have a modified experience for viewers using ad blockers

Wikia is not accessible if you’ve made further modifications. Remove the custom ad blocker rule(s) and the page will load as expected.

Each of the official Spectrum 128 models (MkI, MkII, +2, +2A, +3) had hardware bugs and compatibility issues. The 128Ke is an 'ideal' Spectrum 128 that eliminates these bugs and provides maximum compatibility with existing 48K and 128K software. It can be built in hardware by modifying a Spectrum +2A. This reference is based on the Spectrum 128 reference from the comp.sys.sinclair FAQ. The 128Ke is similar to the 48K machine, but with extra memory accessed by paging it into the top 16K of RAM. There are also some timing differences:

  • The main processor runs at 3.54690 MHz, as opposed to 3.50000 MHz.
  • There are 228 T-states per scanline, as opposed to 224.
  • There are 311 scanlines per frame, as opposed to 312.
  • There are 63 scanlines before the television picture, as opposed to 64.

To modify the border at the position of the first byte of the screen, the OUT must finish after 14365, 14366, 14367 or 14368 T states have passed since interrupt. As with the 48K machine, on some machines all timings (including contended memory timings) are one T state later. Note that this means that there are 70908 T states per frame, and the '50 Hz' interrupt occurs at 50.01 Hz, as compared with 50.08 Hz on the 48K machine. The ULA bug which causes snow when I is set to point to contended memory still occurs, and also appears to crash the machine shortly after I is set to point to contended memory.

Hardware Modifications

RAM

The additional memory features of the 128Ke are controlled to by writes to port 0x7ffd. As normal on Sinclair hardware, the port address is in fact only partially decoded and the hardware will respond to any port address with bits 1 and 15 reset. However, 0x7ffd should be used if at all possible to avoid conflicts with other hardware.


When memory is being paged, interrupts should be disabled and the stack should be in an area which is not going to change. If normal interrupt code is to run, then the system variable at 0x5b5c (23388) must be kept updated with the last value sent to port 0x7ffd. Reading from 0x7ffd produces no special results: floating bus values will be returned as would be returned from any other port not attached to any hardware.


The byte output will be interpreted as follows:
Bits 0-2: RAM page (0-7) to map into memory at 0xc000.
Bit 3: Select normal (0) or shadow (1) screen to be displayed. The normal screen is in bank 5, whilst the shadow screen is in bank 7. Note that this does not affect the memory between 0x4000 and 0x7fff, which is always bank 5.
Bit 4: ROM select. ROM 0 is the 128k editor and menu system; ROM 1 contains 48K BASIC.
Bit 5: If set, memory paging will be disabled and further output to this port will be ignored until the computer is reset.


The memory map of these computers is:

0xffff +--------+--------+--------+--------+--------+--------+--------+--------+
       | Bank 0 | Bank 1 | Bank 2 | Bank 3 | Bank 4 | Bank 5 | Bank 6 | Bank 7 |
       |        |        |(also at|        |        |(also at|        |        |
       |        |        | 0x8000)|        |        | 0x4000)|        |        |
       |        |        |        |        |        | screen |        | screen |
0xc000 +--------+--------+--------+--------+--------+--------+--------+--------+
       | Bank 2 |        Any one of these pages may be switched in.
       |        |
       |        |
       |        |
0x8000 +--------+
       | Bank 5 |
       |        |
       |        |
       | screen |
0x4000 +--------+--------+
       | ROM 0  | ROM 1  | Either ROM may be switched in.
       |        |        |
       |        |        |
       |        |        |
0x0000 +--------+--------+


RAM banks 1,3,4,6 and most of 7 are used for the silicon disc; the rest of 7 contains editor scratchpads.


The 128Ke has the extra memory configurations of the +2A/+3.


Port 0x7ffd behaves in the almost exactly the same way as on the 128K/+2, with one exceptions; the partial decoding used is now slightly different: the hardware will respond only to those port addresses with bit 1 reset, bit 14 set and bit 15 reset (as opposed to just bits 1 and 15 reset on the 128K/+2). The extra paging features of the 128Ke are controlled by port 0x1ffd (again, partial decoding applies here: the hardware will respond to all port addresses with bit 1 reset, bit 12 set and bits 13, 14 and 15 reset). This port is also write-only, and its last value should be saved at 0x5b67 (23399).


Port 0x1ffd responds as follows:


  • Bit 0: Paging mode. 0=normal, 1=special
  • Bit 1-2: In special mode, configuration select.


When special mode is selected, the memory map changes to one of four configurations specified in bits 1 and 2 of port 0x1ffd:

Bit 2 =0    Bit 2 =0    Bit 2 =1    Bit 2 =1
        Bit 1 =0    Bit 1 =1    Bit 1 =0    Bit 1 =1
0xffff +--------+  +--------+  +--------+  +--------+
       | Bank 3 |  | Bank 7 |  | Bank 3 |  | Bank 3 |
       |        |  |        |  |        |  |        |
       |        |  |        |  |        |  |        |
       |        |  | screen |  |        |  |        |
0xc000 +--------+  +--------+  +--------+  +--------+
       | Bank 2 |  | Bank 6 |  | Bank 6 |  | Bank 6 |
       |        |  |        |  |        |  |        |
       |        |  |        |  |        |  |        |
       |        |  |        |  |        |  |        |
0x8000 +--------+  +--------+  +--------+  +--------+
       | Bank 1 |  | Bank 5 |  | Bank 5 |  | Bank 7 |
       |        |  |        |  |        |  |        |
       |        |  |        |  |        |  |        |
       |        |  | screen |  | screen |  | screen |
0x4000 +--------+  +--------+  +--------+  +--------+
       | Bank 0 |  | Bank 4 |  | Bank 4 |  | Bank 4 |
       |        |  |        |  |        |  |        |
       |        |  |        |  |        |  |        |
       |        |  |        |  |        |  |        |
0x0000 +--------+  +--------+  +--------+  +--------+

An example of a typical bank switch on the 128Ke is:

LD      A,(0x5b5c)      ;Previous value of port
 AND     0xf8
 OR      4               ;Select bank 4
 LD      BC,0x7ffd
 DI
 LD      (0x5b5c),A
 OUT     (C),A
 EI


The principle is the same for all bank switching: change only the bits you need to.


RAM banks 4-7 are contended, which reduces the speed of memory access in these banks. Unlike the earlier machines, no I/O ports are contended. Although this differs from contention on the earlier machines, the 128 manual erroneously lists 4-7 as the contended banks. Most software was written to the specification and therefore will run as intended. The 128Ke contended memory timings differ from earlier machines; the timing differences mean that the top-left pixel of the screen is displayed 14364 T-states after the 50 Hz interrupt occurs, as opposed to 14336. The T-states (relative to the interrupt) at which delays occur are given in the following table:

Cycle #   Delay
-------   -----
 14365      1
 14366    No delay
 14367      7
 14368      6
 14369      5
 14370      4
 14371      3
 14372      2
 14373      1
 14374    No delay
 14375      7
 14376      6


and so on, until cycle 14494, when the display of the first scanline on the screen has been completed, and no more delays are inserted until 14593 (=14365+228) when the cycle repeats. The other difference occurs for instructions which have multiple 'pc+1' or 'hl' entries in the breakdown for the other machines: on the +2A/+3, these entries are combined into just one. This means that, for example, JR becomes pc:4,pc+1:8.

Unlike earlier machines, port 0xfe is not contended; whether ports 0x7ffd and 0x1ffd are contended is currently unknown. Bit 6 of Port 0xfe does not show the same dependence on what was written to Port 0xfe as it does on the other machines, and always returns 0 if there is no signal. Finally, reading from a non-existing port (eg 0xff) will give the screen/attribute bytes as it does on the 48K/128K/+2: This can be achieved on a +2A using a small hardware modification.

ROMs

Unlike the standard +2A, the 128Ke only uses two ROMs. This can be achieved on a +2A by using two copies of the 32K EPROM in each ROM slot. ROM 0 is the UK 128 Editor with a three byte call to the screen test code NOPed out. ROM 1 is the original 48 BASIC ROM. These are the ROMs used in the Spectrum SE and can be obtained from the Fuse emulator package. Using these ROMs gives the following effects:

  • There is no support for the keypad.
  • The editor will be marginally faster as it is not checking for the keypad.
  • The screen-test is no longer available.
  • Programs that checksum the ROM will work correctly, e.g. Travel With Trashman.
  • Programs that use the empty area at the end of the ROM as an IM2 table will work correctly, e.g. Bomb Jack.
  • Programs that use the last two UDGs will run correctly in 128 BASIC.
  • The LIST command will display the last two UDGs in place of PLAY and SPECTRUM in listings. The commands can still be entered as usual in the editor.

Keypad


The 128K machine's keypad extra editing facilities are also available via the normal keyboard in 128 BASIC:

FUNCTION                        KEYS
-----------------------------------------
Beginning of next word          [E] [S] J
Beginning of previous word      [E] I
Up ten lines                    [E] P
Down ten lines                  [S] I
Start of line                   [E] [S] 2
End of line                     [E] M
First line                      [E] N
Last line                       [E] T
Screen                          [E] [S] 8
Delete this character           [E] [S] K
Delete word left                [E] E
Delete word right               [E] W
Delete to start of line         [E] K
Delete to end of line           [E] J

[E] = Extended Mode
[S] = Symbol Shift

Sound Chip


The AY-3-8912 sound chip is a widely used one, to be found in the MSX, Vectrex, Amstrad CPC range, etc. It is controlled by two I/O ports:

  • OUT (0xfffd) - Select a register 0-14
  • IN (0xfffd) - Read the value of the selected register
  • OUT (0xbffd) - Write to the selected register

Unlike earlier 128s, reading the AY ports returns the last byte written.

Joysticks


The 128Ke has two Sinclair-type joystick ports built in. These use the Atari-standard connection. This can be achieved on a +2A by rewiring the ports.


Also on Fandom

Random wikia